My understanding is that it is supposed to help CPUs take advantage of out of order execution.
According to this blog post, recent Intel CPUs can issue 4 instructions total per cycle, and AMD CPUs can issue 5.
My understanding is that it is supposed to help CPUs take advantage of out of order execution.
According to this blog post, recent Intel CPUs can issue 4 instructions total per cycle, and AMD CPUs can issue 5.